153 lines
7.1 KiB
C
153 lines
7.1 KiB
C
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/********************************** (C) COPYRIGHT *******************************
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* File Name : ch32v00x_spi.h
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* Author : WCH
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* Version : V1.0.0
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* Date : 2022/08/08
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* Description : This file contains all the functions prototypes for the
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* SPI firmware library.
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* SPDX-License-Identifier: Apache-2.0
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*******************************************************************************/
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#ifndef __CH32V00x_SPI_H
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#define __CH32V00x_SPI_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <ch32v00x.h>
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/* SPI Init structure definition */
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typedef struct
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{
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uint16_t SPI_Direction; /* Specifies the SPI unidirectional or bidirectional data mode.
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This parameter can be a value of @ref SPI_data_direction */
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uint16_t SPI_Mode; /* Specifies the SPI operating mode.
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This parameter can be a value of @ref SPI_mode */
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uint16_t SPI_DataSize; /* Specifies the SPI data size.
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This parameter can be a value of @ref SPI_data_size */
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uint16_t SPI_CPOL; /* Specifies the serial clock steady state.
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This parameter can be a value of @ref SPI_Clock_Polarity */
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uint16_t SPI_CPHA; /* Specifies the clock active edge for the bit capture.
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This parameter can be a value of @ref SPI_Clock_Phase */
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uint16_t SPI_NSS; /* Specifies whether the NSS signal is managed by
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hardware (NSS pin) or by software using the SSI bit.
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This parameter can be a value of @ref SPI_Slave_Select_management */
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uint16_t SPI_BaudRatePrescaler; /* Specifies the Baud Rate prescaler value which will be
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used to configure the transmit and receive SCK clock.
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This parameter can be a value of @ref SPI_BaudRate_Prescaler.
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@note The communication clock is derived from the master
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clock. The slave clock does not need to be set. */
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uint16_t SPI_FirstBit; /* Specifies whether data transfers start from MSB bit. */
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uint16_t SPI_CRCPolynomial; /* Specifies the polynomial used for the CRC calculation. */
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} SPI_InitTypeDef;
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/* SPI_data_direction */
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#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
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#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
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#define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
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#define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
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/* SPI_mode */
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#define SPI_Mode_Master ((uint16_t)0x0104)
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#define SPI_Mode_Slave ((uint16_t)0x0000)
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/* SPI_data_size */
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#define SPI_DataSize_16b ((uint16_t)0x0800)
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#define SPI_DataSize_8b ((uint16_t)0x0000)
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/* SPI_Clock_Polarity */
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#define SPI_CPOL_Low ((uint16_t)0x0000)
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#define SPI_CPOL_High ((uint16_t)0x0002)
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/* SPI_Clock_Phase */
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#define SPI_CPHA_1Edge ((uint16_t)0x0000)
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#define SPI_CPHA_2Edge ((uint16_t)0x0001)
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/* SPI_Slave_Select_management */
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#define SPI_NSS_Soft ((uint16_t)0x0200)
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#define SPI_NSS_Hard ((uint16_t)0x0000)
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/* SPI_BaudRate_Prescaler */
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#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
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#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
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#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
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#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
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#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
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#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
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#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
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#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
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/* SPI_MSB transmission */
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#define SPI_FirstBit_MSB ((uint16_t)0x0000)
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/* SPI_I2S_DMA_transfer_requests */
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#define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
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#define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
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/* SPI_NSS_internal_software_management */
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#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
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#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
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/* SPI_CRC_Transmit_Receive */
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#define SPI_CRC_Tx ((uint8_t)0x00)
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#define SPI_CRC_Rx ((uint8_t)0x01)
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/* SPI_direction_transmit_receive */
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#define SPI_Direction_Rx ((uint16_t)0xBFFF)
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#define SPI_Direction_Tx ((uint16_t)0x4000)
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/* SPI_I2S_interrupts_definition */
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#define SPI_I2S_IT_TXE ((uint8_t)0x71)
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#define SPI_I2S_IT_RXNE ((uint8_t)0x60)
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#define SPI_I2S_IT_ERR ((uint8_t)0x50)
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#define SPI_I2S_IT_OVR ((uint8_t)0x56)
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#define SPI_IT_MODF ((uint8_t)0x55)
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#define SPI_IT_CRCERR ((uint8_t)0x54)
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#define I2S_IT_UDR ((uint8_t)0x53)
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/* SPI_I2S_flags_definition */
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#define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
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#define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
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#define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
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#define I2S_FLAG_UDR ((uint16_t)0x0008)
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#define SPI_FLAG_CRCERR ((uint16_t)0x0010)
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#define SPI_FLAG_MODF ((uint16_t)0x0020)
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#define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
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#define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
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void SPI_I2S_DeInit(SPI_TypeDef *SPIx);
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void SPI_Init(SPI_TypeDef *SPIx, SPI_InitTypeDef *SPI_InitStruct);
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void SPI_StructInit(SPI_InitTypeDef *SPI_InitStruct);
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void SPI_Cmd(SPI_TypeDef *SPIx, FunctionalState NewState);
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void SPI_I2S_ITConfig(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
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void SPI_I2S_DMACmd(SPI_TypeDef *SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
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void SPI_I2S_SendData(SPI_TypeDef *SPIx, uint16_t Data);
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uint16_t SPI_I2S_ReceiveData(SPI_TypeDef *SPIx);
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void SPI_NSSInternalSoftwareConfig(SPI_TypeDef *SPIx, uint16_t SPI_NSSInternalSoft);
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void SPI_SSOutputCmd(SPI_TypeDef *SPIx, FunctionalState NewState);
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void SPI_DataSizeConfig(SPI_TypeDef *SPIx, uint16_t SPI_DataSize);
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void SPI_TransmitCRC(SPI_TypeDef *SPIx);
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void SPI_CalculateCRC(SPI_TypeDef *SPIx, FunctionalState NewState);
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uint16_t SPI_GetCRC(SPI_TypeDef *SPIx, uint8_t SPI_CRC);
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uint16_t SPI_GetCRCPolynomial(SPI_TypeDef *SPIx);
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void SPI_BiDirectionalLineConfig(SPI_TypeDef *SPIx, uint16_t SPI_Direction);
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FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef *SPIx, uint16_t SPI_I2S_FLAG);
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void SPI_I2S_ClearFlag(SPI_TypeDef *SPIx, uint16_t SPI_I2S_FLAG);
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ITStatus SPI_I2S_GetITStatus(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT);
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void SPI_I2S_ClearITPendingBit(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT);
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#ifdef __cplusplus
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}
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#endif
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#endif /*__CH32V00x_SPI_H */
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