Update CH32V003 Template #1
3 changed files with 12 additions and 12 deletions
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@ -7,7 +7,7 @@
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* Printf , Delay functions.
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* Printf , Delay functions.
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*********************************************************************************
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* Attention: This software (modified or not) and binary are used for
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* Attention: This software (modified or not) and binary are used for
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* microcontroller manufactured by Nanjing Qinheng Microelectronics.
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* microcontroller manufactured by Nanjing Qinheng Microelectronics.
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*******************************************************************************/
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*******************************************************************************/
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#include <debug.h>
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#include <debug.h>
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@ -167,7 +167,7 @@ void SDI_Printf_Enable(void)
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*
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*
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* @return size - Data length
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* @return size - Data length
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*/
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*/
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__attribute__((used))
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__attribute__((used))
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int _write(int fd, char *buf, int size)
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int _write(int fd, char *buf, int size)
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{
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{
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int i = 0;
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int i = 0;
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@ -224,7 +224,7 @@ int _write(int fd, char *buf, int size)
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*
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*
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* @return size: Data length
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* @return size: Data length
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*/
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*/
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__attribute__((used))
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__attribute__((used))
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void *_sbrk(ptrdiff_t incr)
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void *_sbrk(ptrdiff_t incr)
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{
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{
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extern char _end[];
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extern char _end[];
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@ -7,7 +7,7 @@
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* Printf , Delay functions.
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* Printf , Delay functions.
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*********************************************************************************
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* Attention: This software (modified or not) and binary are used for
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* Attention: This software (modified or not) and binary are used for
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* microcontroller manufactured by Nanjing Qinheng Microelectronics.
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* microcontroller manufactured by Nanjing Qinheng Microelectronics.
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*******************************************************************************/
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*******************************************************************************/
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#ifndef __DEBUG_H
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#ifndef __DEBUG_H
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@ -9,10 +9,10 @@
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*********************************************************************************/
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*********************************************************************************/
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#include <ch32v00x.h>
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#include <ch32v00x.h>
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/*
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/*
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* Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after
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* Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after
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* reset the HSI is used as SYSCLK source).
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* reset the HSI is used as SYSCLK source).
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* If none of the define below is enabled, the HSI is used as System clock source.
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* If none of the define below is enabled, the HSI is used as System clock source.
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*/
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*/
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//#define SYSCLK_FREQ_8MHz_HSI 8000000
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//#define SYSCLK_FREQ_8MHz_HSI 8000000
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@ -153,10 +153,10 @@ static void SetSysClock(void)
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#elif defined SYSCLK_FREQ_48MHz_HSE
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#elif defined SYSCLK_FREQ_48MHz_HSE
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SetSysClockTo_48MHz_HSE();
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SetSysClockTo_48MHz_HSE();
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#endif
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#endif
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/* If none of the define above is enabled, the HSI is used as System clock£¬
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/* If none of the define above is enabled, the HSI is used as System clock£¬
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* source (default after reset)
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* source (default after reset)
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*/
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*/
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}
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}
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@ -229,7 +229,7 @@ static void SetSysClockTo_48MHZ_HSI(void)
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}
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}
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/* Select PLL as system clock source */
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/* Select PLL as system clock source */
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RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
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RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
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RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
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RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
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/* Wait till PLL is used as system clock source */
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/* Wait till PLL is used as system clock source */
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while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
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while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
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{
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{
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@ -438,4 +438,4 @@ static void SetSysClockTo_48MHz_HSE(void)
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