Update template to modern GCC #1

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thomas merged 8 commits from logan/CH32V203:master into master 2023-11-25 01:59:18 -05:00
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logan added 8 commits 2023-08-15 01:45:37 -04:00
The original march option was wrong (RV32E). According to WCH, the instruction
set is RV32IMAC. Updating the GCC version broke a ton of things since it
better complied with stack alignment requirements that RV32E had, which
RV32I was not compatible with.

Additionally, newer versions of the RISC-V ISA spec split off the Zicsr and
Zifencei instruction from RV32I. GCC versions 12 and newer began using
this spec, leading to missing opcode errors.

Lastly, "--specs=nosys.specs" and "--specs=nano.specs" allegedly don't
go together, and nano is apparently preferred.

Also "-mcmodel=medany" is needed apparently.
See https://gcc.gnu.org/onlinedocs/gcc/RISC-V-Options.html#index-mcmodel_003dmedany
thomas merged commit 4481235181 into master 2023-11-25 01:59:18 -05:00
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Reference: WCH-Templates/CH32V203#1
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