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Logan G 95f0acc88c Updated CMakeLists to work with upstream GCC >=12 ... The original march option was wrong (RV32E). According to WCH, the instruction set is RV32IMAC. Updating the GCC version broke a ton of things since it better complied with stack alignment requirements that RV32E had, which RV32I was not compatible with. Additionally, newer versions of the RISC-V ISA spec split off the Zicsr and Zifencei instruction from RV32I. GCC versions 12 and newer began using this spec, leading to missing opcode errors. Lastly, "--specs=nosys.specs" and "--specs=nano.specs" allegedly don't go together, and nano is apparently preferred. Also "-mcmodel=medany" is needed apparently. See https://gcc.gnu.org/onlinedocs/gcc/RISC-V-Options.html#index-mcmodel_003dmedany		2023-08-09 23:55:02 -06:00
Core	Initial Commit	2023-07-08 22:36:15 -04:00
Debug	My timer code is better :)	2023-07-08 22:49:50 -04:00
Ld	Initial Commit	2023-07-08 22:36:15 -04:00
Peripheral	Initial Commit	2023-07-08 22:36:15 -04:00
Startup	Initial Commit	2023-07-08 22:36:15 -04:00
User	Fixed this file for upstream GCC use	2023-08-09 23:51:45 -06:00
.gitignore	Initial Commit	2023-07-08 22:36:15 -04:00
CMakeLists.txt	Updated CMakeLists to work with upstream GCC >=12	2023-08-09 23:55:02 -06:00