Compare commits
1 commit
master
...
thomasrewr
Author | SHA1 | Date | |
---|---|---|---|
af02a6db99 |
5 changed files with 120 additions and 87494 deletions
87350
fuuckfuckfuck2
87350
fuuckfuckfuck2
File diff suppressed because it is too large
Load diff
198
main.py
198
main.py
|
@ -1,151 +1,105 @@
|
||||||
#made by zombie
|
# made by zombie
|
||||||
#02/01/21
|
# 02/01/21
|
||||||
|
|
||||||
#0-255 is internal registers and flags and etc
|
|
||||||
# program execcution starts at 256
|
|
||||||
#stack starts at end of memory FILO
|
|
||||||
|
|
||||||
#flags
|
|
||||||
#nil nil nil nil nil nil negative zero
|
|
||||||
|
|
||||||
|
import math
|
||||||
import numpy as np
|
import numpy as np
|
||||||
|
|
||||||
import opcodes as ops
|
import opcodes as ops
|
||||||
|
from console import Console
|
||||||
|
from memory import Memory
|
||||||
from registers import Registers
|
from registers import Registers
|
||||||
np.set_printoptions(threshold=np.inf)
|
np.set_printoptions(threshold=np.inf)
|
||||||
|
|
||||||
|
|
||||||
|
class ZCPU:
|
||||||
class ZombieCPU:
|
_halted = False
|
||||||
_regs = Registers()
|
_regs = Registers()
|
||||||
def __init__(self, memorysize=None, debug=None):
|
_mem = None
|
||||||
self._memorysize = memorysize
|
|
||||||
self._memory = np.zeros(memorysize)
|
def __init__(self, memory, debug=None):
|
||||||
|
print('Processor Init')
|
||||||
self._debug = debug
|
self._debug = debug
|
||||||
|
self._mem = memory
|
||||||
|
|
||||||
def reset(self):
|
def reset(self):
|
||||||
if self._debug:
|
print('Processor Resetting')
|
||||||
print('Processor Reseting')
|
self._regs.sp = self._mem.size() - 1 # Set stackpointer
|
||||||
self._memory = np.zeros(self._memorysize) #clear memory
|
self._regs.ip = 0 # Set instruction pointer
|
||||||
|
|
||||||
self._regs.esp = self._memorysize - 1 #set stackpointer
|
|
||||||
self._regs.eip = 256 #set instructiojn pointer #fuck you thomas
|
|
||||||
print(self._regs.eip)
|
|
||||||
def exec(self):
|
def exec(self):
|
||||||
Halted = False
|
while not self._halted:
|
||||||
while not Halted: #change this to if not halt
|
# Fetch instruction
|
||||||
|
opcode = self._mem.read(self._regs.ip)
|
||||||
|
address = self._mem.read(self._regs.ip + 1)
|
||||||
|
value = self._mem.read(self._regs.ip + 2)
|
||||||
|
|
||||||
#fetch
|
|
||||||
opcode = self._memory[int(self._regs.eip)]
|
|
||||||
address = self._memory[int(self._regs.eip + 1)]
|
|
||||||
value = self._memory[int(self._regs.eip + 2)]
|
|
||||||
|
|
||||||
if self._debug:
|
if self._debug:
|
||||||
print(f'Opcode: {opcode}\nAddress: {address}\nValue: {value}\nIP: {self._regs.eip}')
|
print(f'Opcode: {opcode}\nAddress: {address}\nValue: {value}\nIP: {self._regs.ip}')
|
||||||
|
|
||||||
if opcode == ops.NOP:
|
if opcode == ops.NOP: # No-op
|
||||||
pass
|
pass
|
||||||
|
|
||||||
elif opcode == ops.HLT:
|
|
||||||
Halted = True
|
|
||||||
if self._debug:
|
|
||||||
print('Processor Halted')
|
|
||||||
|
|
||||||
elif opcode == ops.RST: #reset
|
elif opcode == ops.HLT: # Halt
|
||||||
|
self._halted = True
|
||||||
|
|
||||||
|
elif opcode == ops.RST: # Reset
|
||||||
self.reset()
|
self.reset()
|
||||||
|
|
||||||
elif opcode == ops.DBG: #debug toggle
|
|
||||||
self._debug = value
|
|
||||||
|
|
||||||
elif opcode == ops.LDI: #mov but actually load immediate
|
|
||||||
self.write_memory(address, value)
|
|
||||||
self.flags_zero(value)
|
|
||||||
self.flags_negative(value)
|
|
||||||
|
|
||||||
elif opcode == ops.PUSH: #push
|
elif opcode == ops.DBG: # Debug (nop if debug is not set) -- This is stoopid
|
||||||
self.write_memory(self._regs.esp, value) #put value onto stack
|
if self._debug:
|
||||||
self._regs.esp -= 1 #dec stackpointer
|
print(f'Opcode: {opcode}\nAddress: {address}\nValue: {value}')
|
||||||
|
|
||||||
elif opcode == ops.POP: #pop
|
|
||||||
self.write_memory(address, self.read_memory_address(self._regs.esp + 1)) #read the last value and put it into address (not the empty space)
|
|
||||||
self._regs.esp += 1 #inc stackpointer
|
|
||||||
|
|
||||||
elif opcode == ops.JMP:
|
|
||||||
self._regs.eip = address - 3
|
|
||||||
|
|
||||||
elif opcode == ops.JZ:
|
|
||||||
if self._regs.flags & 0b00000001:
|
|
||||||
self._regs.eip = address - 3
|
|
||||||
|
|
||||||
elif opcode == ops.CMP:
|
|
||||||
self.flags_zero(address - value)
|
|
||||||
|
|
||||||
elif opcode == ops.INC:
|
elif opcode == ops.LDI: # ldi
|
||||||
self.write_memory(address, self.read_memory_address(address) + 1)
|
self._mem.write(address, value)
|
||||||
self.flags_zero(self.read_memory_address(address))
|
|
||||||
self.flags_negative(self.read_memory_address(address))
|
|
||||||
|
|
||||||
elif opcode == ops.DEC:
|
|
||||||
self.write_memory(address, self.read_memory_address(address) - 1)
|
|
||||||
self.flags_zero(self.read_memory_address(address))
|
|
||||||
self.flags_negative(self.read_memory_address(address))
|
|
||||||
|
|
||||||
self._regs.eip += 3 #increment instruction pointer
|
|
||||||
|
|
||||||
|
|
||||||
#flag shit
|
elif opcode == ops.PUSH: # push
|
||||||
def read_flags(self, i):
|
self._mem.write(self._regs.sp, value)
|
||||||
return self._regs
|
self._regs.sp -= 1
|
||||||
|
|
||||||
def flags_zero(self, value):
|
elif opcode == ops.POP: # pop
|
||||||
if value == 0:
|
self._regs.sp += 1
|
||||||
self._regs.flags = self._regs.flags | 0b00000001
|
self._mem.write(address, self._mem.read(self._regs.sp))
|
||||||
else:
|
|
||||||
self._regs.flags = self._regs.flags & ~0b00000001
|
else:
|
||||||
def flags_negative(self, value):
|
raise RuntimeException(f'Invalid Opcode: {opcode}')
|
||||||
if value < 0:
|
|
||||||
self._regs.flags = self._regs.flags | 0b00000010
|
#increment instruction pointer
|
||||||
else:
|
self._regs.ip += 3
|
||||||
self._regs.flags = self._regs.flags & ~0b00000010
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#memory
|
|
||||||
def set_memory(self, memory):
|
|
||||||
self._memory = memory
|
|
||||||
def write_memory(self, address, value):
|
|
||||||
self._memory[int(address)] = value
|
|
||||||
def read_memory(self):
|
|
||||||
return self._memory
|
|
||||||
def read_memory_address(self, address):
|
|
||||||
return self._memory[int(address)]
|
|
||||||
|
|
||||||
if __name__ == "__main__":
|
if __name__ == "__main__":
|
||||||
cpu = ZombieCPU(65536, False)
|
|
||||||
cpu.reset()
|
|
||||||
|
|
||||||
#hard coded opcodes
|
#hard coded opcodes
|
||||||
cpu.write_memory(256, ops.LDI) #mov
|
ram = Memory(65536)
|
||||||
cpu.write_memory(257, 27) #address 27
|
|
||||||
cpu.write_memory(258, 105) #105 into ^
|
ram.write(0, ops.LDI)
|
||||||
cpu.write_memory(259, ops.PUSH) #push
|
ram.write(1, 100)
|
||||||
cpu.write_memory(260, 0) #unused in this op
|
ram.write(2, 5)
|
||||||
cpu.write_memory(261, 27) #the value at address 27 onto the stack
|
|
||||||
cpu.write_memory(262, ops.POP) #pop
|
ram.write(3, ops.PUSH)
|
||||||
cpu.write_memory(263, 100) #into 100
|
ram.write(4, 0)
|
||||||
cpu.write_memory(264, 0) #unused in this op
|
ram.write(5, 69)
|
||||||
cpu.write_memory(265, ops.CMP)
|
|
||||||
cpu.write_memory(266, 10)
|
ram.write(6, ops.POP)
|
||||||
cpu.write_memory(267, 11) #should set the zero flag
|
ram.write(7, 101)
|
||||||
cpu.write_memory(268, ops.INC) #increment
|
ram.write(8, 0)
|
||||||
cpu.write_memory(269, 100)
|
|
||||||
cpu.write_memory(270, 0) #unused
|
ram.write(9, ops.DBG)
|
||||||
cpu.write_memory(271, ops.HLT)
|
ram.write(10, 1)
|
||||||
|
ram.write(11, 2)
|
||||||
|
|
||||||
|
ram.write(12, ops.HLT)
|
||||||
|
ram.write(13, 0)
|
||||||
|
ram.write(14, 0)
|
||||||
|
|
||||||
|
cpu = ZCPU(ram, False)
|
||||||
|
cpu.reset()
|
||||||
|
|
||||||
cpu.exec()
|
cpu.exec()
|
||||||
|
|
||||||
print(cpu.read_memory_address(100))
|
print(ram.read(100))
|
||||||
|
print(ram.read(101))
|
||||||
|
print(ram.read(102))
|
||||||
|
|
||||||
#c = Console(cpu.read_memory()) ima finish this later
|
#c = Console(cpu.read_memory()) ima finish this later
|
||||||
#c.draw()
|
#c.draw()
|
||||||
|
|
||||||
|
|
27
memory.py
Normal file
27
memory.py
Normal file
|
@ -0,0 +1,27 @@
|
||||||
|
import numpy as np
|
||||||
|
|
||||||
|
class Memory:
|
||||||
|
def __init__(self, size):
|
||||||
|
self._memory = np.zeros(size)
|
||||||
|
|
||||||
|
def write(self, address, data):
|
||||||
|
address = int(address)
|
||||||
|
if 0 > address >= self._memory.size:
|
||||||
|
# TODO: Raise an exception and throw an interrupt here
|
||||||
|
raise RuntimeException('Invalid write address')
|
||||||
|
|
||||||
|
self._memory[address] = data
|
||||||
|
|
||||||
|
def read(self, address):
|
||||||
|
address = int(address)
|
||||||
|
if 0 > address >= self._memory.size:
|
||||||
|
# TODO: Raise an exception and throw an interrupt here
|
||||||
|
raise RuntimeException('Invalid write address')
|
||||||
|
|
||||||
|
return self._memory[address]
|
||||||
|
|
||||||
|
def clear(self, data=0):
|
||||||
|
self._memory.fill(data)
|
||||||
|
|
||||||
|
def size(self):
|
||||||
|
return self._memory.size
|
19
opcodes.py
19
opcodes.py
|
@ -1,12 +1,7 @@
|
||||||
NOP = 0 # No operation
|
NOP = 0 # No-op
|
||||||
HLT = 1 # Halt
|
HLT = 1 # Halt
|
||||||
RST = 2 # Reset
|
RST = 2 # Reset
|
||||||
DBG = 3 # Enables Debug
|
DBG = 3 # Debug
|
||||||
LDI = 4 # Load Immediate
|
LDI = 4 # Load Immediate
|
||||||
PUSH = 5 # Push
|
PUSH = 5 # Push
|
||||||
POP = 6 # Pop
|
POP = 6 # Pop
|
||||||
JMP = 7 # Jump to address
|
|
||||||
JZ = 8 # Jump to address if zero
|
|
||||||
CMP = 9 # Compare and set zero flag
|
|
||||||
INC = 10 # increment
|
|
||||||
DEC = 11 # decrement
|
|
||||||
|
|
20
registers.py
20
registers.py
|
@ -1,11 +1,11 @@
|
||||||
class Registers:
|
class Registers:
|
||||||
eip = 0 # instruction pointer
|
ip = 0
|
||||||
eax = 0
|
ax = 0
|
||||||
ebx = 0
|
bx = 0
|
||||||
ecx = 0
|
cx = 0
|
||||||
edx = 0
|
dx = 0
|
||||||
esi = 0 # source
|
si = 0
|
||||||
edi = 0 # destination
|
di = 0
|
||||||
esp = 0 # stack pointer
|
sp = 0
|
||||||
ebp = 0
|
bp = 0
|
||||||
flags = 0b00000000 #flags ob
|
flags = 0
|
||||||
|
|
Loading…
Reference in a new issue