Commit graph

9 commits

Author SHA1 Message Date
0ca95f59f8
Surpress unused variable warning, it's sort of wrong 2023-08-10 00:07:56 -06:00
d1d767cdde
Use default strict-align for target 2023-08-10 00:04:41 -06:00
95f0acc88c
Updated CMakeLists to work with upstream GCC >=12
The original march option was wrong (RV32E). According to WCH, the instruction
set is RV32IMAC. Updating the GCC version broke a ton of things since it
better complied with stack alignment requirements that RV32E had, which
RV32I was not compatible with.

Additionally, newer versions of the RISC-V ISA spec split off the Zicsr and
Zifencei instruction from RV32I. GCC versions 12 and newer began using
this spec, leading to missing opcode errors.

Lastly, "--specs=nosys.specs" and "--specs=nano.specs" allegedly don't
go together, and nano is apparently preferred.

Also "-mcmodel=medany" is needed apparently.
See https://gcc.gnu.org/onlinedocs/gcc/RISC-V-Options.html#index-mcmodel_003dmedany
2023-08-09 23:55:02 -06:00
5aeffc6277
Fixed this file for upstream GCC use 2023-08-09 23:51:45 -06:00
6ca77928e2
Fixed wrong variable type in printf 2023-08-09 23:37:02 -06:00
a891650679
Changed project name to make sense 2023-08-09 23:36:21 -06:00
c7eb07a9d1
My timer code is better :) 2023-07-08 22:49:50 -04:00
6d26129dd2
Added cmake 2023-07-08 22:44:26 -04:00
0ea34ea16a
Initial Commit 2023-07-08 22:36:15 -04:00