thomas/ZCpu
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

Added signals

Browse source
This commit is contained in:
Thomas Muller 2024-03-08 23:24:34 -05:00
parent 6fbbb3bb49
commit 73587036c7
1 changed files with 19 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

19
notes
View file

@ -46,3 +46,22 @@ mov 420, [A] -- imm idr -- mem[ip + 1] <- mem[A]
add $13, $32 -- ida ida -- mem[13] <- mem[13] + mem[32] add $13, $32 -- ida ida -- mem[13] <- mem[13] + mem[32]
inc A, 14 -- reg imm -- A <- A + 1 | Z <- (A == 14) # Cursed zero flag inc A, 14 -- reg imm -- A <- A + 1 | Z <- (A == 14) # Cursed zero flag
---------------
-- Signals --
---------------
IR_W -- level -- D_BUS -> IR
LATCH_PC -- edge -- PC_MUX -> PC, PC_MUX is either PC++ or from branch logic, see SEL_PC_LOAD
SEL_PC_LOAD -- mux -- Selects between PC++ or branch logic, feeds PC register
PC_BUF -- level -- PC -> A_BUS
MAR_W -- level -- A_BUS -> MEM_A
MBR_W -- level -- MEM_D -> D_BUS or D_BUS -> MEM_D depending on MBR_W
MEM_R -- level -- Put mem[MEM_A] on MEM_D
IN_SEL -- bus -- Selects register to write to
A_SEL -- bus -- Selects "A"(first operand) register
B_SEL -- bus -- Selects "B"(second operand) register
REG_WR -- edge -- regs[IN_SEL] <- REG_D_IN
REG_A_RD -- level -- A_OUT <- regs[A_SEL]
REG_B_RD -- level -- B_OUT <- regs[B_SEL]